Nowadays, programmable system-on-chip (PSoC)-based platforms, which combine a microcontroller unit (MCU) along with field programmable gate array (FPGA) technology, are becoming more cost-effective, low-power, and secure, while keeping the enhanced computation capabilities. Such features, turn these solutions a great option to be deployed at the IoT network edge. Moreover, such platforms add extra processing capabilities to already existing systems by allowing the deployment of dedicated hardware accelerators on the FPGA fabric.
The goal of this thesis is to create an agnostic hardware radio interface for a low-end IoT device, the CUTE mote. The CUTE mote already defines a set of features and hardware accelerated modules/peripherals that aim at tackling some important aspects, such as the connectivity, interoperability, security, power management systems, and acceleration support. Currently it supports two embedded OS for IoT (Contiki and RIOT), an IEEE 802.15.4 radio interface, and network-related accelerators integrated in the XIoT.
In order to improve such accelerators, while deploying new ones, this thesis will focus on refactoring the XIoT, abstracting the radio interface protocol (i.e. SPI, I2C), while keeping the radio operation fully transparent and agnostic from the OS in use.